Fantasy Console Wiki - User contributions [en]

TheGameRazer

2024-03-14T05:30:43Z

BILLPC2684: fixed up the OAM diagram

[[File:TGR_Logo.png|thumb|TheGameRazer's Logo]]

'''TheGameRazer'''(CodeName: 'Taylor') is a Modern, Retro-styled 16-BIT GameSystem inspired by the SegaGenesis and SuperNintendo. 
Designed and created by [https://fantasyconsoles.org/wiki/User:BILLPC2684 BILLPC2684] over on [https://github.com/BILLPC2684 Github]

==Official Github Repos==
* [https://github.com/BILLPC2684/TGR-PRTO-RAYLIB TGR-PRTO-RAYLIB ⟦Current⟧] from 2023
* [https://github.com/BILLPC2684/TGR-PRTO-JS TGR-PRTO-JS ⟦Archived⟧] from 2022
* [https://github.com/BILLPC2684/TGR-PRTO-PYGAME TGR-PRTO-PYGAME ⟦Archived⟧] from 2019
* [https://github.com/BILLPC2684/TGR-PRTO-Love2D TGR-PRTO-Love2D ⟦Archived⟧] from 2018
* [https://github.com/BILLPC2684/TGR-PRTO-C TGR-PRTO-C ⟦Archived⟧] from 2017

==Specs==
'''ROM Size''': 16 to 256 MB 
'''Number of ROM Banks''': 2 (16 MB seekable in total) 
'''RAM Size''': 64 MB of RAM (expandable to 128 MB) 
'''Video RAM Size''': 32 MB of RAM (expandable to 64 MB) 
'''Video FrameBuffers''': Layers 5, 5th is for final rendering 
'''Video Resolutions''': ''480x360'', ''800x600'', ''852x480'' and ''1280x720'' 
'''Audio''': None at the moment. 

==Assembly Instruction Set for Taylor using CustomASM==
* REGs are A, B, C, D, E, F, G, and H (0-7 respecitvely)
not to be confused with
* Instruction A, B, and C, which can represent ":REG" or a ":FLAG", their value can range from 0x0 to 0xF(15)
* IMM is a Intermediate Value, can be anything from 0x0000000 to 0x7FFFFFF
* / means continue reading same spot 1 line up

HEADER0 -> generates DummyData for 16-char ROM Name and 12-char ROM Version.
HEADER1 -> generates DummyData for 16-char ROM Name, 12-char ROM Version and 32-char ROM Author.
HEADER2 -> generates DummyData for 16-char ROM Name, 12-char ROM Version, 32-char ROM Author and 32-char Checksum.

mov A:REG, B:REG -> moves B:REG to A:REG
load A:REG, IMM -> loads IMM to A:REG

add A:REG, B:REG, C:REG -> adds A and B, to C
addi A:REG, IMM, C:REG -> adds A and IMM, to C

sub A:REG, B:REG, C:REG -> subtracts A and B, to C
subi A:REG, IMM, C:REG -> subtracts A and IMM, to C

mul A:REG, B:REG, C:REG -> multiplies A and B, to C
muli A:REG, IMM, C:REG -> multiplies A and IMM, to C

div A:REG, B:REG, C:REG -> divides A and B, to C
divi A:REG, IMM, C:REG -> divides A and IMM, to C

mod A:REG -> return last division's remander to A
mod A:REG, B:REG, C:REG -> divides A and B, and return remander to C
modi A:REG, IMM, C:REG -> divides A and IMM, /

and A:REG, B:REG, C:REG -> bitwise ands A and B togther, into C
andi A:REG, IMM, C:REG -> bitwise ands A and IMM togther, /

or A:REG, B:REG, C:REG -> bitwise ors A and B togther, into C
ori A:REG, IMM, C:REG -> bitwise ors A and IMM togther, /

xor A:REG, B:REG, C:REG -> bitwise xors A and B togther, into C
xori A:REG, IMM, C:REG -> bitwise xors A and IMM togther, /

bsl A:REG, B:REG, C:REG -> bitshifts A to the left by B, into C
bsli A:REG, IMM, C:REG -> bitshifts A to the left by IMM, /

bsr A:REG, B:REG, C:REG -> bitshifts A to the right by B, into C
bsri A:REG, IMM, C:REG -> bitshifts A to the right by IMM, /

not A:REG -> inverts A

flag A:REG -> read the CPU's Flags into A

jmp A:REG, B:REG -> jumps to A..B
jmp IMM -> jumps to the given Address
jmp .Label -> jumps to the .Label's address

cmpeq A:REG, B:REG, C -> if A == B >-/-> then continue, else skip 1 or C instruction
cmpeqi A:REG, IMM, C -> if A == IMM >-/
|
cmplt A:REG, B:REG, C -> if A -/
cmplti A:REG, IMM, C -> if A < IMM >-/
|
cmpgt A:REG, B:REG, C -> if A > B >-/
cmpgti A:REG, IMM, C -> if A > IMM >-/

split A:REG, B:REG, C:REG, 8 -> splits A into B and C | 8-bit (16b -> 8b,8b)
split A:REG, B:REG, C:REG, 4 -> splits A into B and C | 4-bit ( 8b -> 4b,4b)

comb A:REG, B:REG, C:REG, 8 -> combines A and B into C | 8-bit (8b,8b -> 16b)
comb A:REG, B:REG, C:REG, 4 -> combines A and B into C | 4-bit (4b,4b -> 8b)

wmem A:REG, B:REG, C:REG -> Writes A at B..C to Memory
wmem A:REG, IMM -> Writes A at IMM to Memory

rmem A:REG, B:REG, C:REG -> Reads B..C from Memory to A
rmem A:REG, IMM -> Reads IMM from Memory to A

halt A:FLAG -> Halts or Restarts the System/Device
hlt___A:FLAG -> /
|HALT_TYPES|______________.
|0:"Halt"current"CPU"Core"|
|1: Halt All CPU Cores |
|2: Shutdown Everything |
|3: Reset Everything |
|_________________________|

disp A:REG -> Displays A ------- (FOR DEBUG ONLY)
disp A:REG, B:REG -> Displays A, and B /
disp A:REG, B:REG, C:REG -> Displays A,B and C /

ipout A:REG, B:REG -> returns Instuction Pointer to A..B | example with 0x17F39: A would be 0x0001 and B would be 0x7F39

page A:FLAG, IMM -> selects ROMBANK(IMM) from CART into MemoryMap[BANKSLOT(A)] | theres only 2 Bank Slots

core A:FLAG, B:FLAG, IMM -> Starts(B==1)/Stops(B==0) core A at IMM Address of memory

push A:REG -> pushes A, into Stack
pop A:REG -> pops Stack, into A
swap -> swaps the first 2 Items in Stack

call A:REG, B:REG -> calls A..B --------------- as a Function [uses Stack]
call IMM -> calls the IMM ---- address /
call .Label -> calls the .Label's /

ret -> returns from a Function [uses Stack]

led IMM -> sets the System's LED color with IMM as #RRGGBB
led A:REG, B:REG, C:REG -> sets the System's LED color with A,B,C as R,G,B

clk A:REG, IMM -> grabs the system's clock in MicroSecond to A (IMM>0 will Reset the clock)

wait A:REG -> waits for a [A]mount of MicroSecond
waiti IMM -> waits for a IMM amount of MicroSecond

break IMM -> Debugs for IMM amount of instructions (FOR DEBUG ONLY)

nop -> what you expected me to do something? NOPe!

==TGR MEMORY MAP==

####################################################
## TGR MEMORY MAP ##################################
# ROM[0] $0800000 [$0000000 - $07FFFFF] 8 MB #
# ROM[1] $0800000 [$0800000 - $0FFFFFF] 8 MB #
# SAV $0800000 [$1000000 - $17FFFFF] 8 MB #
# WRAM $3FBFE00 [$1800000 - $57BFDFF] 63.7 MB #
# STACK#0 $0020000 [$57BFE00 - $57DFDFF] 128 KB #
# STACK#1 $0020000 [$57DFE00 - $57FFDFF] 128 KB #
# I/O $0000200 [$57FFE00 - $57FFFFF] 512 BY #
# SRAMEXT $4000000 [$5800000 - $97FFFFF] 64 MB #
# VRAM $1F80000 [$9800000 - $B77FFFF] 31.5 MB #
# VSTACK#0 $0020000 [$B780000 - $B79FFFF] 128 KB #
# VSTACK#1 $0020000 [$B7A0000 - $B7BFFFF] 128 KB #
# VSTACK#2 $0020000 [$B7C0000 - $B7DFFFF] 128 KB #
# VSTACK#3 $0020000 [$B7E0000 - $B7FFFFF] 128 KB #
# VRAMEXT $2000000 [$B800000 - $D7FFFFF] 32 MB #
## 216 MB [0xD800000] ##############################
####################################################
## TGR VIDEO MEMORY MAP ############################
# VRAM $1F80000 [$0000000 - $1F7FFFF] 31.5 MB #
# VSTACK#0 $0020000 [$1F80000 - $1F9FFFF] 128 KB #
# VSTACK#1 $0020000 [$1FA0000 - $1FBFFFF] 128 KB #
# VSTACK#2 $0020000 [$1FC0000 - $1FDFFFF] 128 KB #
# VSTACK#3 $0020000 [$1FE0000 - $1FFFFFF] 128 KB #
# VRAMEXT $2000000 [$2000000 - $3FFFFFF] 32 MB #
## 64 MB [0x4000000] ##############################
####################################################
#### ROM can be up to 16 MB split into 2 Banks! ####
## exROM can be up to 128 MB split into 16 Banks! ##
####################################################

==GPU's OAM Sprite Objects==
.__________________.
.==========|OAM_Sprite_Objects|__________________________.
|Byte[1]."."Byte[0]""""""""""""""""""""""""""""""""""""""|_________________.
|\7654 3210 \7654 3210 \"-"BIT"Not"Used""|
|\XXXX XXXX \XXXX XXXX . Sprite Address [____0-67108863] \ X BIT Used |
|Byte[3]. . Byte[2] / Local GPU Address (0x3FFFFFF) \ = BIT Unavaible |
|\---- -XXX \XXXX XXXX / \_________________|
|\XXXX X--- \---- ---- ColorPallet [____0-___31] (0x001F)|
| |
|Byte[4] |
|\7654 3210 |
|\---- XXXX Alpha. . . . . . . . . [____0-___15] (0x000F)|
|\XXXX ---- Layer. . . . . . . . . [____0-___15] (0x000F)|
| |
|Byte[6]. . Byte[5] |
|\7654 3210 \7654 3210 |
|\---- ---- \XXXX XXXX Width . . . [____0- 255] (0x00FF)|
|\XXXX XXXX \---- ---- Height. . . [____0-__255] (0x00FF)|
| |
|Byte[8]. . Byte[7] |
|\7654 3210 \7654 3210 Resized (0 = Ignore) |
|\---- ---- \XXXX XXXX \Width . . [____0- 255] (0x00FF)|
|\XXXX XXXX \---- ---- \Height . . [____0-__255] (0x00FF)|
| |
|Byte[A]. . Byte[9] |
|\7654 3210 \7654 3210 |
|\-+XX XXXX \XXXX XXXX X Cords . . [____0-16383] (0x7FFF)|
|\X--- ---- \---- ---- Flip X. . . [____0-___15] (0x000F)|______________.
| |"""1280"is"""|
|Byte[C]. . Byte[B] | the highest |
|\7654 3210 \7654 3210 |_____________|
|\-+XX XXXX \XXXX XXXX Y Cords . . [____0-16383] (0x7FFF)|
|\X--- ---- \---- ---- Flip Y. . . [____0-___15] (0x000F)|
|________________________________________________________|._______________________________________.
|"0x9800000."//GPU"MEMORY"LOCATION"""""""""""""""| | Layers' PtrLength |
| +32*15*3 . //CPLength (32 Color Pallets) | | Address = 32-bits (actually 28-bit) |
| +40. . . . //PtrLength [Address,Width,Height] | | Width..Height = 32-bits (16-bit each) |
| +OAM Objects(MAX:0xFFFF)*13 | | Total 64-bits 8 bytes per Layer |
| = SpriteData Area | | 8*5 layers = 40 |
|________________________________________________| |_______________________________________|

[[Category:Fantasy consoles]]
[[Category:16 bit consoles]]
[[Category:Memory-mapped systems]]

TheGameRazer

2024-03-04T23:37:17Z

BILLPC2684: fixed small error with github links

[[File:TGR_Logo.png|thumb|TheGameRazer's Logo]]

'''TheGameRazer'''(CodeName: 'Taylor') is a Modern, Retro-styled 16-BIT GameSystem inspired by the SegaGenesis and SuperNintendo. 
Designed and created by [https://fantasyconsoles.org/wiki/User:BILLPC2684 BILLPC2684] over on [https://github.com/BILLPC2684 Github]

==Official Github Repos==
* [https://github.com/BILLPC2684/TGR-PRTO-RAYLIB TGR-PRTO-RAYLIB ⟦Current⟧] from 2023
* [https://github.com/BILLPC2684/TGR-PRTO-JS TGR-PRTO-JS ⟦Archived⟧] from 2022
* [https://github.com/BILLPC2684/TGR-PRTO-PYGAME TGR-PRTO-PYGAME ⟦Archived⟧] from 2019
* [https://github.com/BILLPC2684/TGR-PRTO-Love2D TGR-PRTO-Love2D ⟦Archived⟧] from 2018
* [https://github.com/BILLPC2684/TGR-PRTO-C TGR-PRTO-C ⟦Archived⟧] from 2017

==Specs==
'''ROM Size''': 16 to 256 MB 
'''Number of ROM Banks''': 2 (16 MB seekable in total) 
'''RAM Size''': 64 MB of RAM (expandable to 128 MB) 
'''Video RAM Size''': 32 MB of RAM (expandable to 64 MB) 
'''Video FrameBuffers''': Layers 5, 5th is for final rendering 
'''Video Resolutions''': ''480x360'', ''800x600'', ''852x480'' and ''1280x720'' 
'''Audio''': None at the moment. 

==Assembly Instruction Set for Taylor using CustomASM==
* REGs are A, B, C, D, E, F, G, and H (0-7 respecitvely)
not to be confused with
* Instruction A, B, and C, which can represent ":REG" or a ":FLAG", their value can range from 0x0 to 0xF(15)
* IMM is a Intermediate Value, can be anything from 0x0000000 to 0x7FFFFFF
* / means continue reading same spot 1 line up

HEADER0 -> generates DummyData for 16-char ROM Name and 12-char ROM Version.
HEADER1 -> generates DummyData for 16-char ROM Name, 12-char ROM Version and 32-char ROM Author.
HEADER2 -> generates DummyData for 16-char ROM Name, 12-char ROM Version, 32-char ROM Author and 32-char Checksum.

mov A:REG, B:REG -> moves B:REG to A:REG
load A:REG, IMM -> loads IMM to A:REG

add A:REG, B:REG, C:REG -> adds A and B, to C
addi A:REG, IMM, C:REG -> adds A and IMM, to C

sub A:REG, B:REG, C:REG -> subtracts A and B, to C
subi A:REG, IMM, C:REG -> subtracts A and IMM, to C

mul A:REG, B:REG, C:REG -> multiplies A and B, to C
muli A:REG, IMM, C:REG -> multiplies A and IMM, to C

div A:REG, B:REG, C:REG -> divides A and B, to C
divi A:REG, IMM, C:REG -> divides A and IMM, to C

mod A:REG -> return last division's remander to A
mod A:REG, B:REG, C:REG -> divides A and B, and return remander to C
modi A:REG, IMM, C:REG -> divides A and IMM, /

and A:REG, B:REG, C:REG -> bitwise ands A and B togther, into C
andi A:REG, IMM, C:REG -> bitwise ands A and IMM togther, /

or A:REG, B:REG, C:REG -> bitwise ors A and B togther, into C
ori A:REG, IMM, C:REG -> bitwise ors A and IMM togther, /

xor A:REG, B:REG, C:REG -> bitwise xors A and B togther, into C
xori A:REG, IMM, C:REG -> bitwise xors A and IMM togther, /

bsl A:REG, B:REG, C:REG -> bitshifts A to the left by B, into C
bsli A:REG, IMM, C:REG -> bitshifts A to the left by IMM, /

bsr A:REG, B:REG, C:REG -> bitshifts A to the right by B, into C
bsri A:REG, IMM, C:REG -> bitshifts A to the right by IMM, /

not A:REG -> inverts A

flag A:REG -> read the CPU's Flags into A

jmp A:REG, B:REG -> jumps to A..B
jmp IMM -> jumps to the given Address
jmp .Label -> jumps to the .Label's address

cmpeq A:REG, B:REG, C -> if A == B >-/-> then continue, else skip 1 or C instruction
cmpeqi A:REG, IMM, C -> if A == IMM >-/
|
cmplt A:REG, B:REG, C -> if A -/
cmplti A:REG, IMM, C -> if A < IMM >-/
|
cmpgt A:REG, B:REG, C -> if A > B >-/
cmpgti A:REG, IMM, C -> if A > IMM >-/

split A:REG, B:REG, C:REG, 8 -> splits A into B and C | 8-bit (16b -> 8b,8b)
split A:REG, B:REG, C:REG, 4 -> splits A into B and C | 4-bit ( 8b -> 4b,4b)

comb A:REG, B:REG, C:REG, 8 -> combines A and B into C | 8-bit (8b,8b -> 16b)
comb A:REG, B:REG, C:REG, 4 -> combines A and B into C | 4-bit (4b,4b -> 8b)

wmem A:REG, B:REG, C:REG -> Writes A at B..C to Memory
wmem A:REG, IMM -> Writes A at IMM to Memory

rmem A:REG, B:REG, C:REG -> Reads B..C from Memory to A
rmem A:REG, IMM -> Reads IMM from Memory to A

halt A:FLAG -> Halts or Restarts the System/Device
hlt___A:FLAG -> /
|HALT_TYPES|______________.
|0:"Halt"current"CPU"Core"|
|1: Halt All CPU Cores |
|2: Shutdown Everything |
|3: Reset Everything |
|_________________________|

disp A:REG -> Displays A ------- (FOR DEBUG ONLY)
disp A:REG, B:REG -> Displays A, and B /
disp A:REG, B:REG, C:REG -> Displays A,B and C /

ipout A:REG, B:REG -> returns Instuction Pointer to A..B | example with 0x17F39: A would be 0x0001 and B would be 0x7F39

page A:FLAG, IMM -> selects ROMBANK(IMM) from CART into MemoryMap[BANKSLOT(A)] | theres only 2 Bank Slots

core A:FLAG, B:FLAG, IMM -> Starts(B==1)/Stops(B==0) core A at IMM Address of memory

push A:REG -> pushes A, into Stack
pop A:REG -> pops Stack, into A
swap -> swaps the first 2 Items in Stack

call A:REG, B:REG -> calls A..B --------------- as a Function [uses Stack]
call IMM -> calls the IMM ---- address /
call .Label -> calls the .Label's /

ret -> returns from a Function [uses Stack]

led IMM -> sets the System's LED color with IMM as #RRGGBB
led A:REG, B:REG, C:REG -> sets the System's LED color with A,B,C as R,G,B

clk A:REG, IMM -> grabs the system's clock in MicroSecond to A (IMM>0 will Reset the clock)

wait A:REG -> waits for a [A]mount of MicroSecond
waiti IMM -> waits for a IMM amount of MicroSecond

break IMM -> Debugs for IMM amount of instructions (FOR DEBUG ONLY)

nop -> what you expected me to do something? NOPe!

==TGR MEMORY MAP==

####################################################
## TGR MEMORY MAP ##################################
# ROM[0] $0800000 [$0000000 - $07FFFFF] 8 MB #
# ROM[1] $0800000 [$0800000 - $0FFFFFF] 8 MB #
# SAV $0800000 [$1000000 - $17FFFFF] 8 MB #
# WRAM $3FBFE00 [$1800000 - $57BFDFF] 63.7 MB #
# STACK#0 $0020000 [$57BFE00 - $57DFDFF] 128 KB #
# STACK#1 $0020000 [$57DFE00 - $57FFDFF] 128 KB #
# I/O $0000200 [$57FFE00 - $57FFFFF] 512 BY #
# SRAMEXT $4000000 [$5800000 - $97FFFFF] 64 MB #
# VRAM $1F80000 [$9800000 - $B77FFFF] 31.5 MB #
# VSTACK#0 $0020000 [$B780000 - $B79FFFF] 128 KB #
# VSTACK#1 $0020000 [$B7A0000 - $B7BFFFF] 128 KB #
# VSTACK#2 $0020000 [$B7C0000 - $B7DFFFF] 128 KB #
# VSTACK#3 $0020000 [$B7E0000 - $B7FFFFF] 128 KB #
# VRAMEXT $2000000 [$B800000 - $D7FFFFF] 32 MB #
## 216 MB [0xD800000] ##############################
####################################################
## TGR VIDEO MEMORY MAP ############################
# VRAM $1F80000 [$0000000 - $1F7FFFF] 31.5 MB #
# VSTACK#0 $0020000 [$1F80000 - $1F9FFFF] 128 KB #
# VSTACK#1 $0020000 [$1FA0000 - $1FBFFFF] 128 KB #
# VSTACK#2 $0020000 [$1FC0000 - $1FDFFFF] 128 KB #
# VSTACK#3 $0020000 [$1FE0000 - $1FFFFFF] 128 KB #
# VRAMEXT $2000000 [$2000000 - $3FFFFFF] 32 MB #
## 64 MB [0x4000000] ##############################
####################################################
#### ROM can be up to 16 MB split into 2 Banks! ####
## exROM can be up to 128 MB split into 16 Banks! ##
####################################################

==GPU's OAM Sprite Objects==
.__________________.
.==========|OAM_Sprite_Objects|__________________________.
|Byte[1]."."Byte[0]""""""""""""""""""""""""""""""""""""""|_________________.
|\7654 3210 \7654 3210 \"-"BIT"Not"Used""|
|\XXXX XXXX \XXXX XXXX . Sprite Address [____0-67108863] \ X BIT Used |
|Byte[3]. . Byte[2] / Local GPU Address (0x3FFFFFF) \ = BIT Unavaible |
|\---- -XXX \XXXX XXXX / \_________________|
|\XXXX X--- \---- ---- ColorPallet [____0-___31] (0x001F)|
| |
|Byte[4] |
|\7654 3210 |
|\---- XXXX Alpha. . . . . . . . . [____0-___15] (0x000F)|
|\XXXX ---- Layer. . . . . . . . . [____0-___15] (0x000F)|
| |
|Byte[6]. . Byte[5] |
|\7654 3210 \7654 3210 |
|\---- ---- \XXXX XXXX Width . . . [____0- 255] (0x00FF)|
|\XXXX XXXX \---- ---- Height. . . [____0-__255] (0x00FF)|
| |
|Byte[8]. . Byte[7] |
|\7654 3210 \7654 3210 |
|\-+XX XXXX \XXXX XXXX X Cords . . [____0-16383] (0x7FFF)|
|\X--- ---- \---- ---- Flip X. . . [____0-___15] (0x000F)|______________.
| |"""1280"is"""|
|Byte[A]. . Byte[9] | the highest |
|\7654 3210 \7654 3210 |_____________|
|\-+XX XXXX \XXXX XXXX X Cords . . [____0-16383] (0x7FFF)|
|\X--- ---- \---- ---- Flip X. . . [____0-___15] (0x000F)|
|________________________________________________________|._______________________________________.
|"0x9800000."//GPU"MEMORY"LOCATION"""""""""""""""| | Layers' PtrLength |
| +32*15*3 . //CPLength (32 Color Pallets) | | Address = 32-bits (actually 28-bit) |
| +40. . . . //PtrLength [Address,Width,Height] | | Width..Height = 32-bits (16-bit each) |
| +OAM Objects(MAX:0xFFFF)*11 | | Total 64-bits 8 bytes per Layer |
| = SpriteData Area | | 8*5 layers = 40 |
|________________________________________________| |_______________________________________|

[[Category:Fantasy consoles]]
[[Category:16 bit consoles]]
[[Category:Memory-mapped systems]]

TheGameRazer

2024-03-04T23:13:12Z

BILLPC2684: Inital post for TheGameRazer

[[File:TGR_Logo.png|thumb|TheGameRazer's Logo]]

'''TheGameRazer'''(CodeName: 'Taylor') is a Modern, Retro-styled 16-BIT GameSystem inspired by the SegaGenesis and SuperNintendo. 
Designed and created by [https://fantasyconsoles.org/wiki/User:BILLPC2684 BILLPC2684] over on [https://github.com/BILLPC2684 Github]

==Official Github Repos==
* [https://github.com/BILLPC2684/TGR-PRTO-RAYLIB TGR-PRTO-RAYLIB ⟦Current⟧ from 2023]
* [https://github.com/BILLPC2684/TGR-PRTO-JS TGR-PRTO-JS ⟦Archived⟧ 2022]
* [https://github.com/BILLPC2684/TGR-PRTO-PYGAME TGR-PRTO-PYGAME ⟦Archived⟧ 2019]
* [https://github.com/BILLPC2684/TGR-PRTO-Love2D TGR-PRTO-Love2D ⟦Archived⟧ from 2018]
* [https://github.com/BILLPC2684/TGR-PRTO-C TGR-PRTO-C ⟦Archived⟧ from 2017]

==Specs==
'''ROM Size''': 16 to 256 MB 
'''Number of ROM Banks''': 2 (16 MB seekable in total) 
'''RAM Size''': 64 MB of RAM (expandable to 128 MB) 
'''Video RAM Size''': 32 MB of RAM (expandable to 64 MB) 
'''Video FrameBuffers''': Layers 5, 5th is for final rendering 
'''Video Resolutions''': ''480x360'', ''800x600'', ''852x480'' and ''1280x720'' 
'''Audio''': None at the moment. 

==Assembly Instruction Set for Taylor using CustomASM==
* REGs are A, B, C, D, E, F, G, and H (0-7 respecitvely)
not to be confused with
* Instruction A, B, and C, which can represent ":REG" or a ":FLAG", their value can range from 0x0 to 0xF(15)
* IMM is a Intermediate Value, can be anything from 0x0000000 to 0x7FFFFFF
* / means continue reading same spot 1 line up

HEADER0 -> generates DummyData for 16-char ROM Name and 12-char ROM Version.
HEADER1 -> generates DummyData for 16-char ROM Name, 12-char ROM Version and 32-char ROM Author.
HEADER2 -> generates DummyData for 16-char ROM Name, 12-char ROM Version, 32-char ROM Author and 32-char Checksum.

mov A:REG, B:REG -> moves B:REG to A:REG
load A:REG, IMM -> loads IMM to A:REG

add A:REG, B:REG, C:REG -> adds A and B, to C
addi A:REG, IMM, C:REG -> adds A and IMM, to C

sub A:REG, B:REG, C:REG -> subtracts A and B, to C
subi A:REG, IMM, C:REG -> subtracts A and IMM, to C

mul A:REG, B:REG, C:REG -> multiplies A and B, to C
muli A:REG, IMM, C:REG -> multiplies A and IMM, to C

div A:REG, B:REG, C:REG -> divides A and B, to C
divi A:REG, IMM, C:REG -> divides A and IMM, to C

mod A:REG -> return last division's remander to A
mod A:REG, B:REG, C:REG -> divides A and B, and return remander to C
modi A:REG, IMM, C:REG -> divides A and IMM, /

and A:REG, B:REG, C:REG -> bitwise ands A and B togther, into C
andi A:REG, IMM, C:REG -> bitwise ands A and IMM togther, /

or A:REG, B:REG, C:REG -> bitwise ors A and B togther, into C
ori A:REG, IMM, C:REG -> bitwise ors A and IMM togther, /

xor A:REG, B:REG, C:REG -> bitwise xors A and B togther, into C
xori A:REG, IMM, C:REG -> bitwise xors A and IMM togther, /

bsl A:REG, B:REG, C:REG -> bitshifts A to the left by B, into C
bsli A:REG, IMM, C:REG -> bitshifts A to the left by IMM, /

bsr A:REG, B:REG, C:REG -> bitshifts A to the right by B, into C
bsri A:REG, IMM, C:REG -> bitshifts A to the right by IMM, /

not A:REG -> inverts A

flag A:REG -> read the CPU's Flags into A

jmp A:REG, B:REG -> jumps to A..B
jmp IMM -> jumps to the given Address
jmp .Label -> jumps to the .Label's address

cmpeq A:REG, B:REG, C -> if A == B >-/-> then continue, else skip 1 or C instruction
cmpeqi A:REG, IMM, C -> if A == IMM >-/
|
cmplt A:REG, B:REG, C -> if A -/
cmplti A:REG, IMM, C -> if A < IMM >-/
|
cmpgt A:REG, B:REG, C -> if A > B >-/
cmpgti A:REG, IMM, C -> if A > IMM >-/

split A:REG, B:REG, C:REG, 8 -> splits A into B and C | 8-bit (16b -> 8b,8b)
split A:REG, B:REG, C:REG, 4 -> splits A into B and C | 4-bit ( 8b -> 4b,4b)

comb A:REG, B:REG, C:REG, 8 -> combines A and B into C | 8-bit (8b,8b -> 16b)
comb A:REG, B:REG, C:REG, 4 -> combines A and B into C | 4-bit (4b,4b -> 8b)

wmem A:REG, B:REG, C:REG -> Writes A at B..C to Memory
wmem A:REG, IMM -> Writes A at IMM to Memory

rmem A:REG, B:REG, C:REG -> Reads B..C from Memory to A
rmem A:REG, IMM -> Reads IMM from Memory to A

halt A:FLAG -> Halts or Restarts the System/Device
hlt___A:FLAG -> /
|HALT_TYPES|______________.
|0:"Halt"current"CPU"Core"|
|1: Halt All CPU Cores |
|2: Shutdown Everything |
|3: Reset Everything |
|_________________________|

disp A:REG -> Displays A ------- (FOR DEBUG ONLY)
disp A:REG, B:REG -> Displays A, and B /
disp A:REG, B:REG, C:REG -> Displays A,B and C /

ipout A:REG, B:REG -> returns Instuction Pointer to A..B | example with 0x17F39: A would be 0x0001 and B would be 0x7F39

page A:FLAG, IMM -> selects ROMBANK(IMM) from CART into MemoryMap[BANKSLOT(A)] | theres only 2 Bank Slots

core A:FLAG, B:FLAG, IMM -> Starts(B==1)/Stops(B==0) core A at IMM Address of memory

push A:REG -> pushes A, into Stack
pop A:REG -> pops Stack, into A
swap -> swaps the first 2 Items in Stack

call A:REG, B:REG -> calls A..B --------------- as a Function [uses Stack]
call IMM -> calls the IMM ---- address /
call .Label -> calls the .Label's /

ret -> returns from a Function [uses Stack]

led IMM -> sets the System's LED color with IMM as #RRGGBB
led A:REG, B:REG, C:REG -> sets the System's LED color with A,B,C as R,G,B

clk A:REG, IMM -> grabs the system's clock in MicroSecond to A (IMM>0 will Reset the clock)

wait A:REG -> waits for a [A]mount of MicroSecond
waiti IMM -> waits for a IMM amount of MicroSecond

break IMM -> Debugs for IMM amount of instructions (FOR DEBUG ONLY)

nop -> what you expected me to do something? NOPe!

==TGR MEMORY MAP==

####################################################
## TGR MEMORY MAP ##################################
# ROM[0] $0800000 [$0000000 - $07FFFFF] 8 MB #
# ROM[1] $0800000 [$0800000 - $0FFFFFF] 8 MB #
# SAV $0800000 [$1000000 - $17FFFFF] 8 MB #
# WRAM $3FBFE00 [$1800000 - $57BFDFF] 63.7 MB #
# STACK#0 $0020000 [$57BFE00 - $57DFDFF] 128 KB #
# STACK#1 $0020000 [$57DFE00 - $57FFDFF] 128 KB #
# I/O $0000200 [$57FFE00 - $57FFFFF] 512 BY #
# SRAMEXT $4000000 [$5800000 - $97FFFFF] 64 MB #
# VRAM $1F80000 [$9800000 - $B77FFFF] 31.5 MB #
# VSTACK#0 $0020000 [$B780000 - $B79FFFF] 128 KB #
# VSTACK#1 $0020000 [$B7A0000 - $B7BFFFF] 128 KB #
# VSTACK#2 $0020000 [$B7C0000 - $B7DFFFF] 128 KB #
# VSTACK#3 $0020000 [$B7E0000 - $B7FFFFF] 128 KB #
# VRAMEXT $2000000 [$B800000 - $D7FFFFF] 32 MB #
## 216 MB [0xD800000] ##############################
####################################################
## TGR VIDEO MEMORY MAP ############################
# VRAM $1F80000 [$0000000 - $1F7FFFF] 31.5 MB #
# VSTACK#0 $0020000 [$1F80000 - $1F9FFFF] 128 KB #
# VSTACK#1 $0020000 [$1FA0000 - $1FBFFFF] 128 KB #
# VSTACK#2 $0020000 [$1FC0000 - $1FDFFFF] 128 KB #
# VSTACK#3 $0020000 [$1FE0000 - $1FFFFFF] 128 KB #
# VRAMEXT $2000000 [$2000000 - $3FFFFFF] 32 MB #
## 64 MB [0x4000000] ##############################
####################################################
#### ROM can be up to 16 MB split into 2 Banks! ####
## exROM can be up to 128 MB split into 16 Banks! ##
####################################################

==GPU's OAM Sprite Objects==
.__________________.
.==========|OAM_Sprite_Objects|__________________________.
|Byte[1]."."Byte[0]""""""""""""""""""""""""""""""""""""""|_________________.
|\7654 3210 \7654 3210 \"-"BIT"Not"Used""|
|\XXXX XXXX \XXXX XXXX . Sprite Address [____0-67108863] \ X BIT Used |
|Byte[3]. . Byte[2] / Local GPU Address (0x3FFFFFF) \ = BIT Unavaible |
|\---- -XXX \XXXX XXXX / \_________________|
|\XXXX X--- \---- ---- ColorPallet [____0-___31] (0x001F)|
| |
|Byte[4] |
|\7654 3210 |
|\---- XXXX Alpha. . . . . . . . . [____0-___15] (0x000F)|
|\XXXX ---- Layer. . . . . . . . . [____0-___15] (0x000F)|
| |
|Byte[6]. . Byte[5] |
|\7654 3210 \7654 3210 |
|\---- ---- \XXXX XXXX Width . . . [____0- 255] (0x00FF)|
|\XXXX XXXX \---- ---- Height. . . [____0-__255] (0x00FF)|
| |
|Byte[8]. . Byte[7] |
|\7654 3210 \7654 3210 |
|\-+XX XXXX \XXXX XXXX X Cords . . [____0-16383] (0x7FFF)|
|\X--- ---- \---- ---- Flip X. . . [____0-___15] (0x000F)|______________.
| |"""1280"is"""|
|Byte[A]. . Byte[9] | the highest |
|\7654 3210 \7654 3210 |_____________|
|\-+XX XXXX \XXXX XXXX X Cords . . [____0-16383] (0x7FFF)|
|\X--- ---- \---- ---- Flip X. . . [____0-___15] (0x000F)|
|________________________________________________________|._______________________________________.
|"0x9800000."//GPU"MEMORY"LOCATION"""""""""""""""| | Layers' PtrLength |
| +32*15*3 . //CPLength (32 Color Pallets) | | Address = 32-bits (actually 28-bit) |
| +40. . . . //PtrLength [Address,Width,Height] | | Width..Height = 32-bits (16-bit each) |
| +OAM Objects(MAX:0xFFFF)*11 | | Total 64-bits 8 bytes per Layer |
| = SpriteData Area | | 8*5 layers = 40 |
|________________________________________________| |_______________________________________|

[[Category:Fantasy consoles]]
[[Category:16 bit consoles]]
[[Category:Memory-mapped systems]]

File:TGR Logo.png

2024-03-04T21:18:16Z

BILLPC2684: TheGameRazer's Logo

== Summary ==
TheGameRazer's Logo